1. Field of the Invention
The present invention relates to an integrated circuit technique for producing a desired offset voltage at the input of a circuit.
2. Description of the Prior Art
Many analog circuits, including comparators and operational amplifiers, are characterized in part by the input offset voltage specification. This provides a measure of how much the voltage on one input terminal must differ from the voltage on another input terminal in order to drive the output to the midpoint in its range. Normally, offsets are desirably as small as possible, and typically range from a few millivolts down to a few microvolts, or even less, in current bipolar and MOS integrated circuits. Since a non-zero offset is typically undesirable, steps are usually taken to minimize the offset. These include careful matching of transistor sizes, and elaborate voltage or current sensing for providing a feedback signal that cancels the offset voltage. However, in some cases, a controllable non-zero offset is desired. For example, a threshold may be desired for discriminating against signals below a certain magnitude. Multiple-thresholds may be desired, as is the case in analog-to-digital converters, where analog signals are quantized. In these and other cases, a resistor divider network is usually used to provide the offset, by dividing the input voltage a desired amount. However, a resistor divider network loads down the input to some extent, which is undesirable in some applications. One application where loading is undesirable is in the receiver portion of an Integrated Services Digital Network (ISDN) transceiver. In that case, a balanced bus is used for transmission among several users, which may vary in number from 1 to 8. It is undesirable to change the loading on the bus as different numbers of users connect to the bus, while at the same time providing a receiver that has a threshold to reject noise voltages below a given value.
It is also known in the art to provide DC level shifting at the input of a differential stage (e.g., an operational amplifier), by the use of source-follower input transistors in the case of field effect transistors, or emitter-follower input transistors in the case of bipolar transistors. In those cases, the input signal is coupled to the control electrodes (gates or bases, respectively), whereas controlled electrodes (sources or emitters, respectively) are connected to the differential inputs. Current sources flow current through the source paths or emitter paths, respectively. However, a typical goal of such designs is again to minimize the offset between the inputs of the differential stage.